Assoc. Prof. Magnus Jahre, , the coordinator of NTNU Energy Efficient Computing Systems (EECS) strategic research initiative will hold a guest lecture at the department on Thursday, Mar. 10, 2016 at 11:15 in REALF B203 (Lille Auditorium).
Date: Thursday, Mar. 10, 2016, 11:15 – 12:00
Place: REALF B203 (Lille Auditorium)
Title: Climbing the Complexity Wall with Efficient Tools and Abstractions
Lecturer: Assoc. Prof. Magnus Jahre
Parallel computer architectures are becoming the norm across the computing continuum. Currently, mobile phones, desktops, laptops, supercomputers and cloud infrastructures are all parallel. Due to the end of Dennard scaling, processor performance growth has gone from being limited by chip area to being power limited, and we are approaching the limit of how many processors that can be added to a single chip and powered simultaneously. To further increase performance, it is expected that future computer architectures will become heterogeneous and include special purpose accelerators. The idea is to include a collection of such accelerators that are only powered when they are needed and turned off otherwise. This makes it possible to increase performance under a constant power budget. The result of these trends is that future computer architectures will be increasingly difficult to program. At the same time, ensuring high programmer productivity is as important as ever. The research problem is to identify and implement abstractions and tools that make it possible for generalist programmers to exploit the compute power of future heterogeneous computing systems.
In this talk, I will introduce the technology trends that drive the development of future computer architectures. In addition, I will give three examples of current research projects by the NTNU Energy Efficient Computing Systems (EECS) strategic research initiative that aim to realise such tools and abstractions. First, the READEX H2020 project enable exploiting application dynamism for improved energy efficiency in High Performance Computing (HPC) systems. Second, the TULIPP H2020 project will develop a generic platform for the design of energy efficient high-performance heterogeneous embedded image processing systems. Finally, I will introduce a novel architecture for FPGA-based acceleration of Sparse Matrix Vector (SpMV) multiplication.
Magnus Jahre got his Master of Technology degree at NTNU in 2007 and his PhD from the same university in 2010. Since 2010, he has been an Associate Professor at the Department of Computer and Information Science at NTNU. His current research interests are memory systems for multi-core architectures, heterogeneous computer systems, energy efficiency, computer architecture simulation, compilers and system software. Jahre is the coordinator of the Energy Efficient Computing Systems (EECS) strategic research initiative, work package leader in the H2020 LEIT ICT project TULIPP, PI in the H2020 FET HPC project READEX, project manager for the SHMAC research project and Head of the Computer Architecture and Design Group (CARD), IDI. He is currently supervising 2 PhD students, co-supervisor for 4 PhD students and mentoring 2 post doctoral researchers. He is an affiliate member of the HiPEAC European Network of Excellence.